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Reverted the draft UE RRC state machine diagram

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Budiarto Herman
2013-08-25 11:26:00 +03:00
parent d6288badf4
commit 0389cc8021
1 changed files with 11 additions and 19 deletions
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30
src/lte/doc/source/figures/lte-ue-rrc-states.dot
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@@ -1,27 +1,19 @@
digraph LteRrcStates {
IDLE_START [shape="box",width=3]
IDLE_CELL_SEARCH [shape="box",width=3]
IDLE_WAIT_MIB_SIB1 [shape="box",width=3]
IDLE_WAIT_MIB [shape="box",width=3]
IDLE_WAIT_SIB1 [shape="box",width=3]
IDLE_CAMPED_NORMALLY [shape="box",width=3]
IDLE_WAIT_SIB2 [shape="box",width=3]
IDLE_RANDOM_ACCESS [shape="box",width=3]
IDLE_CONNECTING [shape="box",width=3]
CONNECTED_NORMALLY [shape="box",width=3]
CONNECTED_HANDOVER [shape="box",width=3]
IDLE_CELL_SELECTION [shape="box",width=4]
IDLE_WAIT_SYSTEM_INFO [shape="box",width=4]
IDLE_CAMPED_NORMALLY [shape="box",width=4]
IDLE_RANDOM_ACCESS [shape="box",width=4]
IDLE_CONNECTING [shape="box",width=4]
CONNECTED_NORMALLY [shape="box",width=4]
CONNECTED_HANDOVER [shape="box",width=4]
IDLE_START -> IDLE_WAIT_MIB [label="manual\nattachment"]
IDLE_START -> IDLE_CELL_SEARCH [label="automatic attachment\nby Idle mode cell selection"]
IDLE_CELL_SEARCH -> IDLE_WAIT_MIB_SIB1 [label="synchronized to a cell"]
IDLE_WAIT_MIB_SIB1 -> IDLE_WAIT_SIB1 [label="rx MIB"]
IDLE_WAIT_MIB -> IDLE_CAMPED_NORMALLY [label="rx MIB"]
IDLE_WAIT_SIB1 -> IDLE_CAMPED_NORMALLY [label="rx SIB1"]
IDLE_CAMPED_NORMALLY -> IDLE_WAIT_SIB2 [label="connection request\nby upper layer"]
IDLE_WAIT_SIB2 -> IDLE_RANDOM_ACCESS [label="rx SIB2"]
IDLE_CELL_SELECTION -> IDLE_WAIT_SYSTEM_INFO [label="cell ID enforced\nby upper layers"]
IDLE_CELL_SELECTION -> IDLE_CAMPED_NORMALLY [label="cell selection\nsuccessful"]
IDLE_WAIT_SYSTEM_INFO -> IDLE_CAMPED_NORMALLY [label="rx MIB + SIB2"]
IDLE_CAMPED_NORMALLY -> IDLE_RANDOM_ACCESS [label="connection request\nby upper layers"]
IDLE_RANDOM_ACCESS -> IDLE_CONNECTING [label="random access\nsuccessful"]
IDLE_RANDOM_ACCESS -> IDLE_CAMPED_NORMALLY [label="random access\nfailure",
style=dashed] // dashed because this has not been implemented yet